The present invention relates to a power converter and especially to a stable voltage converter with multiple pulse width modulated channels.
Since the power consumption of the central processing unit (CPU) of computers is increasing, direct current (DC) converters need to supply more than 60 amps of current for computer operation. Consequently, a multi-channel structure converter provides a more economical performance than a single channel converter. Among the multi-channel converters, the multi-channel pulse width modulated (PWM) converter having a current ripple scattering effect may choose the smaller and cheaper filter capacitor. Therefore, most of the paralleled multi-channel converters employ the structure of the multiple PWM converter channels.
A multi-channel converter connects in parallel a plurality of pulse width modulated channels with the same output voltage for providing a higher output current. There is often a voltage difference between the channels supplying the same load. The difference between the channels may occur one or some channels providing a comparatively higher current. In particular, some types of converters, synchronous rectified converters, have the ability to sink as well as source output current. In these converters, a great current may flow from one channel to another. This phenomenon can lead to excessive power dissipation, at which point these channels bear the highest power load. Thereafter, the supplying ability of working components in every channel must be increased and the load that the converter supplies must be limited below the combined full load capability of the individual channel. Therefore, the converter cost may increase and the working life thereof may be reduced for only a few channels working in the high temperature. Hence, a converter with the capability to share and balance the load current may be the better choice. Every channel provides the same current, that is to say, every channel bears the same load and has almost the same working life. The working life and cost problems are solved by sharing and balancing the load current.
As shown in FIG. 1, there is one kind of converter called the passive droop converter. This converter utilizes a plurality of independent PWM channels coupled with a plurality of resists respectively located on the output sides of the channels. The output current of every channel is reduced as the output current increases, whereupon every channel shares the output current equally. The passive droop converter with a simple control circuit increases additional power consumption and the total output voltage is reduced as the total output current increases. As the drawing depicts, error amplifier (E/A) 201a, 201b, 201c compares the VREF and the voltage of position 205a, 205b, 205c and then outputs control signal to the pulse width modulator 202a, 202b, 202c. The pulse width modulator 202a, 202b, 202c controls the duty cycle of the power switch 203a, 203b, 203c to output pulse power output. The inductor 204a, 204b, 204c and the capacitor 208 filter the pulse power output to form a direct current output. The direct current output reduces the output voltage be proportional to the direct current output by the devoltage resister 206a, 206b, 206c, and then outputs to the load 207. The output voltage is more reduced if the output current is more increased, whereupon every channel shares the output current equally. The converter may balance every channel""s output current but problems of additional power consumption and total output voltage reducing as the total output current increases still exist.
Another kind of converter is shown in the FIG. 2. The converter, called an active droop converter, is an improvement on the passive droop converter of FIG. 1. The converter senses the channel current signals of the converter channels and then adjusts a modified reference signal according to the deviation between the channel current signal and the reference voltage, VREF. Every channel may reduce the channel power output proportional to the channel current output, and therefore every channel may share the total output current equally. The active droop converter improves upon the passive droop converter to reduce the power consumption problem but the total output voltage still is reduced as the total output current increases. As the drawing depicts, the active droop converter with multiple converter channels utilizes the current sensors 306a, 306b, 306c to sense channel current signals of the channels and the subtraction circuits 301a, 301b, 301c compare the VREF and the channel current signals to output modified reference signals to the E/As 302a, 302b, 302c. The E/As 302a, 302b, 302c compare the modified reference signals and the voltage output of the channel to form signals, VE/A. The pulse width modulators 303a, 303b, 303c adjust the duty cycle of the power switches 304a, 304b, 304c based on the signals VE/A and a ramp input. Finally, the inductor 305a, 305b, 305c and the capacitor 309 filter the pulse power output to form the direct current output to the load 308.
According to the above description, the multi-channel PWM converter in parallel reduces the total output voltage as the total output current increasing because of the reference signals be reduced. Therefore, a method for simplifying the control circuits of the converter with a stable total output voltage is needed in the paralleled multi-channel PWM converter.
The present invention provides a stable voltage and balanced current converter with multiple pulse width modulated channels.
The stable voltage converter includes an error amplifier, a plurality of subtraction circuits, a plurality of converter channels, and a plurality of current sensors. The error amplifier has a reference voltage input and an average output voltage input. Therefore, the error amplifier compares the reference voltage and the average output voltage to generate an error signal. Each of the subtraction circuits is coupled with the error amplifier and one of the converter channels. The subtraction circuits get the error signal and channel current signals from the current sensors, and then generate modified error signals to control the converter channel. Each of converter channels includes a pulse width modulator, a power switch, and a filter. The pulse width modulator, having a ramp input and the modified error signal input, forms a pulse width modulator signal output. The ramp input is coupled with a ramp voltage source. The power switch couples with the pulse width modulator, inputs the pulse width modulator signal and then outputs a pulse power output. The filter having an inductor and a capacitor couples with the power switch and filters the pulse power to generate the direct current power output. The current sensor detects the direct current power output of the channel and generates the channel current signal to the subtraction circuit. Therefore, each of the plurality of converter channels may automatically reduces the direct current power output thereof through a proportion of the direct current power output, and then the converter channels may balanced output current equally. The total output voltage may adjust according to the comparison result of the reference voltage and the total output voltage. Hence, the converter according to the invention may be a stable voltage and balanced current converter with multiple pulse width modulated channels.